1. Field of the Invention
The present invention generally relates to a bond pad structure, and more particularly, to a bond pad structure located over an active circuit structure.
2. Description of Related Art
Along with the higher and higher integration of an integrated circuit (IC), the area of an IC chip is a very significant factor which affects the cost thereof. The larger the area of a chip, the higher the IC cost is. For the IC, an I/O circuit, an electrostatic discharge protection circuit and a bond pad structure also occupy certain areas. These areas may be even larger than the area of the active circuit structure itself in some circumstances.
In general, the bond pad structure is located on the periphery region of the above-mentioned I/O circuit. In order to largely reduce the chip area and the production cost, in the prior art, a technique has been developed, where a bond pad structure, an I/O circuit and an active circuit structure are formed on a same region by using a process technology, and such a technique is termed as BOAC technique (bond pad structure over active circuit structure).
During a wiring process on a bond pad structure, the bond pad may be fractured or peeled from a dielectric layer due to the impacts caused by a wiring press process or a wiring pull process, which further results in the poor conductance of the product. To solve this problem of the prior art, a metal layer for supporting is formed under the bond pad. Although a bond pad structure employs more metal layers for supporting, the strength of the bond pad structure can be enhanced, but it brings new problems of wasting space and increasing cost.
To promote the efficiency of a semiconductor device in the currently conventional semiconductor process, a material with a lower dielectric coefficient is preferably used for forming the dielectric layer. However, the dielectric layer with the lower dielectric coefficient has a weak strength, which would lower the wire pull strength of the bond pad structure and degrade the reliability. As a compromise solution, the bond pad structure employs only one metal layer for supporting. In fact, with the bond pad structure having a metal layer for supporting, the bond pad structure still has risk of being fractured or peeled from a dielectric layer and even damaging other semiconductor structures under the bond pad structure during a wiring process.